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  • Esia: semiconductor sales in line with seasonal patterns

    2018-02-12

    As reported by Esia(European Semiconductor Industry Association), in January worldwide sales of semiconductors amounted to US$ 26.880 billion. These results are in line with seasonal patterns – as the first months of the year are usually slower for semiconductors – and represent a 2.7% drop compared to the December sales of US$ 27.617 billion. In January, the European market was weaker globally by 1.7% compared to December 2015. Sales reached US$ 2.721 billion compared to US$ 2.767 billion a month ago. Nevertheless, in Europe, demand remained strong for several key product categories. Discretes¸ opto-sensing and emitting chips, analog devices, logic ICs and chips designed to be used in specific applications, all experienced steady growth compared to December. Euro-Dollar exchange rates did not affect the European sales picture  as much as in previous months. Still, some effects could be felt. Measured in Euro, semiconductor sales were 2.512 billion Euros in January 2016, down 0.6% versus the previous month and an increase of 4% versus the same month a year ago. On a YTD basis, semiconductor sales decreased by 0.3%. Keywords A1.semiconductors;  A2.InSb;  A3.GaN wafer Sources: redazione For more information, please visit our website:www.powerwaywafer.com, send us email at sales@powerwaywafer.com .

  • WSTS recalculates forecast for the worldwide semiconductor market

    2018-02-09

    Worldwide semiconductor market is expected to be slightly positive in 2016 and grow moderately in 2017. WSTS has re-calculated the Autumn 2015 forecast using the actual figures of the fourth quarter 2015. During 2016 growth is expected to be driven by sensors, micros, and logic. All major product categories and regions are forecasted to grow moderately in 2017, under the prerequisite of a stable economic market environment throughout the forecast period. The worldwide semiconductor market is forecasted to be up 0.3% to 336 billion dollar in 2016 and up 3.1% to 347 billion in 2017. Keywords A1.semiconductors;  A2.WSIS;  A3.GaN wafer Sources: http://www.householdappliancesworld.com/2016/02/29/wsts-recalculates-forecast-for-the-worldwide-semiconductor-market/ For more information, please visit our website:www.powerwaywafer.com, send us email at sales@powerwaywafer.com .

  • Worldwide semiconductor market is expected to grow further in both 2015 and 2016

    2018-02-08

    According to data published by WSTSabout worldwide semiconductor market, all product categories and regions are forecasted to grow steadily but moderately in the next two years, under the assumption of a further macro economy recovery throughout the entire forecast period and maturing historically strong markets. WSTS anticipates the world semiconductor market to grow 4.9% to US$352 billion in 2015. For 2016, the market is forecasted to be US$363 billion, up 3.1%. By end market, automotive and communications are expected to grow stronger than the total market, whereas consumer and computer are assumed to remain almost flat. Regionally, Asia-Pacific will continue to be the fastest growing region and is expected to reach US$209 billion in 2016, which is already a share of almost 60% of the total semiconductor market. In 2014, the global market showed a solid growth of almost 10% up to US$336 billion, driven mainly by double digit increase of memory product category. All other major product categories are also showed positive growth rates. The highest growth rates are reported for the memory (18.2%), discretes (10.8%) and analog (10.6%) categories. Keywords A1.semiconductors;  A2.WSIS Sources:http://www.householdappliancesworld.com/2015/03/27/worldwide-semiconductor-market-is-expected-to-grow-further-in-both-2015-and-2016/ For bmore information, please visit our website:www.powerwaywafer.com, send us email at sales@powerwaywafer.com .

  • Method for modulating the wafer bow of free-standing GaN substrates via inductively coupled plasma etching

    2018-02-05

    The bowing curvature of the free-standing GaN substrate significantly decreased almost linearly from 0.67 to 0.056 m−1 (i.e. the bowing radius increased from 1.5 to 17.8 m) with increase in inductively coupled plasma (ICP) etching time at the N-polar face, and eventually changed the bowing direction from convex to concave. Furthermore, the influences of the bowing curvature on the measured full width at half maximum (FWHM) of high-resolution X-ray diffraction (HRXRD) in (0 0 2) reflection were also deduced, which reduced from 176.8 to 88.8 arcsec with increase in ICP etching time. Decrease in the nonhomogeneous distribution of threading dislocations and point defects as well as VGa–ON complex defects on removing the GaN layer from N-polar face, which removed large amount of defects, was one of the reasons that improved the bowing of the free-standing GaN substrate. Another reason was the high aspect ratio of needle-like GaN that appeared at the N-polar face after ICP etching, which released the compressive strain of the free-standing GaN substrate. By doing so, crack-free and extremely flat free-standing GaN substrates with a bowing radius of 17.8 m could be obtained. Keywords A1. Etching;  A1. GaN substrate;  A3. Hydride vapor phase epitaxy;  B1. Nitrides;  B2. GaN Source:Sciencedirect For more information, please visit our website:www.powerwaywafer.com, send us email at sales@powerwaywafer.com .

  • Chemical lift-off and direct wafer bonding of GaN/InGaN P–I–N structures grown on ZnO

    2018-02-02

    Highlights •MOCVD growth of a p-GaN/i-InGaN/n-GaN (PIN) solar cell on ZnO/Sapphire templates. •In-depth structural characterizations showing no back-etching of ZnO. •Chemical lift-off and wafer-bonding of the structure on float glass. •Structural characterizations of the device on glass. Abstract p-GaN/i-InGaN/n-GaN (PIN) structures were grown epitaxially on ZnO-buffered c-sapphire substrates by metal organic vapor phase epitaxy using the industry standard ammonia precursor for nitrogen. Scanning electron microscopy revealed continuous layers with a smooth interface between GaN and ZnO and no evidence of ZnO back-etching. Energy Dispersive X-ray Spectroscopy revealed a peak indium content of just under 5 at% in the active layers. The PIN structure was lifted off the sapphire by selectively etching away the ZnO buffer in an acid and then direct bonded onto a glass substrate. Detailed high resolution transmission electron microscoy and grazing incidence X-ray diffraction studies revealed that the structural quality of the PIN structures was preserved during the transfer process. Keywords A1. Characterization;  A3. Metalorganic vapor phase epitaxy;  B1. Nitrides;  B1. Zinc compounds;  B3. Solar cells Source:Sciencedirect For more information, please visit our website:www.powerwaywafer.com, send us email at sales@powerwaywafer.com .

  • Effect of annealing on the residual stress and strain distribution in CdZnTe wafers

    2018-02-01

    The effect of annealing on residual stress and strain distribution in CdZnTe wafers was studied based using an X-ray diffraction (XRD) method. The results proved the effectiveness of annealing on the reduction of the residual stress and strain. By the means of transmission electron microscopy (TEM) and infrared (IR) transmission analyses, it was found that dislocation gliding, decreases in the size of the Te precipitates, dispersing of Te precipitates, composition homogenization, and point defects recombination contributed to a reduction of the residual stress and strain during annealing of the wafer. Additionally, the larger residual stress in CdZnTe wafers introduced bigger lattice misfits. Thus, for more the residual stress and strain in the CdZnTe wafer, the IR transmission will be lowered. Keywords A1. Annealed;  A1. Lattice misfit;  A1. Precipitate;  A1. Residual stress and strain;  A1. X-ray diffraction;  B2. CdZnTe;  B2. Semiconducting II–VI materials Source:Sciencedirect For more information, please visit our website:www.powerwaywafer.com, send us email at sales@powerwaywafer.com .

  • InP Epitaxial Wafers

    2018-01-30

    Indium Phosphide (InP) is a key semiconductor material that enables optical systems to deliver the performance required for data center, mobile backhaul, metro and long-haul applications. Lasers, photodiodes and waveguides fabricated on InP operate at the optimum transmission window of glass fiber, which enable efficient fiber communications. PAM-XIAMEN’s proprietary Etched Facet Technology (EFT) allows wafer level testing similar to traditional semiconductor manufacturing. EFT enables high yield, high performance and reliable lasers. 1)2"InP wafer Orientation:±0.5° Type/Dopant:N/S;N/Un-doped Thickness:350±25mm Mobility:>1700 Carrier Concentration:(2~10)E17 EPD:<50000cm^-2 Polished:SSP 2)1",2"InP wafer Orientation:±0.5° Type/Dopant:N/Un-doped Thickness:350±25mm Mobility:>1700 Carrier Concentration:(2~10)E17 EPD:<50000cm^-2 Polished:SSP 3)1",2"InP wafer Orientation:A±0.5° Type/Dopant:N/S;N/Un-doped Thickness:350±25mm Polished:SSP 4)2"InP wafer Orientation:B±0.5° Type/Dopant:N/Te;N/Undoped Thickness:400±25mm;500±25mm Polished:SSP 5)2"InP wafer Orientation:(110)±0.5° Type/Dopant:P/Zn;N/S Thickness:400±25mm Polished:SSP/DSP 6)2"InP wafer Orientation:(211)B;(311)B Type/Dopant:N/Te Thickness:400±25mm Polished:SSP/DSP 7)2"InP wafer Orientation:(100)2°off+/-0.1 degree t.n. (110) Type/Dopant:SI/Fe Thickness:500±20mm Polished:SSP 8)2" size InGaAs/InP epitaxial wafer,and we accept custom specs. Substrate: (100) InP substrate Epi Layer 1: In0.53Ga0.47As layer , undoped , thickness 200 nm Epi Layer 2: In0.52Al0.48As layer , undoped , thickness 500 nm Epi Layer 3:In0.53Ga0.47As layer , undoped , thickness 1000 nm Top Layer :In0.52Al0.48As layer , undoped , thickness 50 nm Xiamen Powerway Advanced Material Co., Ltd (PAM-XIAMEN) offers the highest purity InGaAs/InP Epitaxial Wafers in the industry today. Sophisticated manufacturing processes have been put in place to customize and produce high quality Indium Phosphide Epitaxial wafers up to 4 inches with wavelengths from 1.7 to 2.6μm, ideally suited for high speed, long wavelength imaging, high speed HBT and HEMTs, APDs and analog-digital converter circuits. Applications using InP-based components can greatly exceed transmission rates in comparison to similar components structured on GaAs or SiGe based platforms. Relative products: InAs wafer InSb wafer InP wafer GaAs wafer GaSb wafer GaP wafer If you are more interesting in insb wafer,Please send emails to us;sales@powerwaywafer.com,and visit our website:www.powerwaywafer.com.

  • InAs (Indium Arsenide )wafer

    2018-01-29

    PAM-XIAMEN provides InAs wafer ( Indium Arsenide ) to optoelectronics industry in diameter up to 2 inch . InAs crystal is a compound  formed by 6N pure In and As element and is grown by Liquid Encapsulated Czochralski ( LEC ) method with EPD < 15000 cm -3 . InAs crystal has high uniformity of electrical parameters and low defect density , suitable for MBE or MOCVD epitaxial growth . We have "epi ready " InAs products with wide  choice in exact or off orientation , low or high doped concentration and surface finish . Please contact us for more product information . 1)2”InAs Type/Dopant:N/S Orientation:[111B]±0.5° Thickness:500±25um Epi-Ready SSP 2)2”InAs Type/Dopant:N/Undoped Orientation : (111)B Thickness:500um±25um SSP 3)2”InAs Type/Dopant:N Un-doped Orientation :A ±0.5° Thickness:500um±25um epi-ready Ra<=0.5nm Carrier Concentration(cm-3):1E16~3E16 Mobility(cm -2 ):>20000 EPD(cm -2 ):<15000 SSP 4)2”InAs Type/Dopant:N/Undoped Orientation :with [001]O.F. Thickness:2mm AS cut 5)2”InAs Type/Dopant:N/P Orientation :(100), Carrier Concentration(cm-3):(5-10)E17, Thickness:500 um SSP All wafers are offered with high quality epitaxy ready finishing. Surfaces are characterised by in-house, advanced optical metrology techniques which include Surfscan haze and particle monitoring, spectroscopic ellipsometry and grazing incidence interferometry The influence of annealing temperature on the optical properties of surface electron accumulation layers in n-type (1 0 0) InAs wafers has been investigated by Raman spectroscopy. It exhibits that Raman peaks due to scattering by unscreened LO phonons disappear with increasing temperature, which indicates that the electron accumulation layer in InAs surface is eliminated by annealing. The involved mechanism was analyzed by X-ray photoelectron spectroscopy, X-ray diffraction and high-resolution transmission electron microscopy. The results show that amorphous In2O3 and As2O3 phases are formed at InAs surface during annealing and, meanwhile, a thin crystalline As layer at the interface between the oxidized layer and the wafer is also generated which leads to a decrease in thickness of the surface electron accumulation layer since As adatoms introduce acceptor type surface states. Relative products: InAs wafer InSb wafer InP wafer GaAs wafer GaSb wafer GaP wafer If you are more interesting in inas wafer,Please send emails to us;sales@powerwaywafer.com,and visit our website:http://www.semiconductorwafers.net.

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