Home / News /

Layered growth modelling of epitaxial growth processes for SiC polytypes

News

Layered growth modelling of epitaxial growth processes for SiC polytypes

2019-01-08

Epitaxial growth processes for SiC polytypes in which a SiC substrate is employed are studied using a layered growth model. The corresponding phase diagrams of epitaxial growth processes are given. First-principles calculations are used to determine the parameters in the layered growth model. The layered growth phase diagrams show that when the rearrangement of atoms in one surface Si–C bilayer is allowed, the 3C-SiC structure is formed.


When the rearrangement of atoms in two surface Si–C bilayers is allowed, the 4H-SiC structure is formed. When the rearrangement of atoms in more than two surface Si–C bilayers, excepting the case of five surface Si–C bilayers, is allowed, the 6H-SiC structure is formed, which is also shown to be the ground state structure. When the rearrangement of atoms in five surface Si–C bilayers is allowed, the 15R-SiC structure is formed. Thus the 3C-SiC phase would grow epitaxially at low temperature, the 4H-SiC phase would grow epitaxially at intermediate temperature and the 6H-SiC or 15R-SiC phases would grow epitaxially at higher temperature.


source:iopscience

For more information, please visit our website: www.semiconductorwafers.net,

send us email at angel.ye@powerwaywafer.com or powerwaymaterial@gmail.com.


Contact Us

If you would like a quotation or more information about our products, please leave us a message, will reply you as soon as possible.